Introduction

An encoder and decoder are combinational logic circuits that convert information from one binary form to another. An encoder takes the single active line among many inputs and produces a short binary code that identifies it. A decoder works in the opposite direction, taking a binary code and driving exactly one output line active.

Both circuits are memoryless. Their outputs depend only on the present inputs, which places them in the same medium-scale integration family as multiplexers, adders and comparators in every digital electronics course.

In practice, the pair appears in memory addressing, keypads, seven-segment displays, interrupt handling, remote controls and position sensors. The same words also appear in communication engineering and machine learning, where they carry related but broader meanings.

This guide explains the definitions, working principles, types and Boolean equations, then solves four exam-style problems and sets out the encoder and decoder difference in a comparison table. It also corrects two common misconceptions and states what the GATE, SSC JE and RRB JE syllabi actually say.

Fundamentals: Combinational Logic and Binary Codes

A combinational circuit is a logic circuit whose output is fixed entirely by its current inputs. Remove the inputs and the output has nothing to remember. A flip-flop, which stores a bit, is the contrast case and belongs to sequential logic.

Next comes counting. n binary lines can form 2ⁿ different patterns, so 3 lines can name 8 things and 4 lines can name 16. This relationship is the entire reason encoders and decoders exist, because it lets a few wires stand in for many.

The second idea is the one-hot signal. A group of lines is one-hot when exactly one of them is at the active level and the rest are inactive. Active-high means the active level is logic 1. Active-low means the active level is logic 0, which is common in TTL-family ICs.

The third idea is the minterm. For n variables, a minterm is an AND term in which every variable appears once, either complemented or uncomplemented. Three variables A, B and C give eight minterms, written m0 to m7, where m5 stands for A·B′·C. Decoders matter in exams because each decoder output is exactly one minterm.

What Is an Encoder and Decoder?

What is an encoder?

An encoder reports which input line is active by producing that line's number in binary. A keypad shows the idea well. It has ten digit keys, yet the processor needs only a 4-bit code to know which key was pressed, and the encoder logic does that compression.

Formally, an encoder is a combinational circuit with up to 2ⁿ input lines and n output lines. Exactly one input is expected to be active at a time, and the n-bit output is the binary number of that input.

What is a decoder?

A decoder takes a binary number and activates the one output line that matches it. A bank of eight numbered lockers works as a loose comparison. Dial 5 and only locker 5 opens, while the other seven stay shut.

Formally, a decoder is a combinational circuit with n input lines and up to 2ⁿ output lines. For each input combination, exactly one output is active, so the outputs form a one-hot code.

Why the two come as a pair

Encoding shrinks a one-hot representation into a compact code, which saves wires and storage. Decoding expands the compact code back into a one-hot form, which is the form most hardware needs to switch a single device on. A system therefore often encodes at one point and decodes at another.

How an Encoder Works

The 4-to-2 and 8-to-3 encoder

Start with the smallest case. A 4-to-2 encoder has inputs I0 to I3 and outputs Y1 and Y0. Only one input is high at a time, and the table below lists the four valid rows.

Reading the columns gives the equations. Y1 is 1 when I2 or I3 is active, and Y0 is 1 when I1 or I3 is active. So the 4-to-2 encoder is just two OR gates:

Y1 = I2 + I3

Y0 = I1 + I3

The same logic scales to an 8-to-3 (octal-to-binary) encoder. Each output bit is the OR of every input whose binary number has a 1 in that bit position:

Y2 = I4 + I5 + I6 + I7

Y1 = I2 + I3 + I6 + I7

Y0 = I1 + I3 + I5 + I7

Notice that I0 appears in none of the equations. The encoder produces all zeros for I0, which creates the first of two problems.

Two flaws of the ordinary encoder

The first flaw is ambiguity at zero. The output 00 can mean that I0 is active or that no input is active at all, and the circuit cannot tell the two cases apart.

The second flaw is multiple active inputs. Suppose I1 and I2 are both high in the 4-to-2 encoder. The equations give Y1 = 1 and Y0 = 1, so the output reads 11, which is the code for I3. The circuit reports an input that was never active.

The priority encoder

A priority encoder removes the second flaw by ranking the inputs. When several are active, it encodes only the highest-ranked one. A valid output V is added so that the all-zero ambiguity is resolved too, since V = 0 means nothing is active.

For a 4-input priority encoder with I3 ranked highest, the truth table uses X for a don't-care input:

The simplified equations follow directly:

Y1 = I3 + I2

Y0 = I3 + I2′·I1

V = I3 + I2 + I1 + I0

Check one row. With I3 = 0, I2 = 0, I1 = 1, Y1 = 0 and Y0 = 0 + 1·1 = 1, so the output is 01, which is the number of I1. The priority rule has worked.

The standard TTL part is the 74148, an 8-line to 3-line priority encoder. According to the 74LS147 and 74LS148 datasheet, both devices have active-low data inputs and outputs, and the 74LS148 encodes eight data lines into a three-line binary code. It adds an enable input (EI), an enable output (EO) and a group signal output (GS), which allow two chips to be cascaded into a 16-input priority encoder. Its sibling, the 74147, encodes nine data lines into a 4-bit BCD code and treats the all-high condition as decimal zero.

Position encoders share the name but not the circuit

The word encoder also names a sensor. A rotary encoder is an electromechanical device that reports the angular position of a shaft. It is not the same circuit as the logic encoder above, although both turn one kind of information into a code.

An incremental rotary encoder measures change in position and typically outputs two square waves, A and B, that are 90 degrees out of phase. This quadrature arrangement lets the controller sense direction as well as movement. An absolute rotary encoder outputs a unique code for each position, so the position is known immediately after power-up. The resolution of an absolute encoder depends on its bit count, and an 8-bit single-turn device has 256 unique positions per revolution.

Absolute encoders commonly use Gray code, where only one bit changes between adjacent positions. Reading a Gray-coded disc during a transition therefore creates an uncertainty of at most one count, while a plain binary disc can mislead by several counts when many bits flip together. This is why a Gray-code-to-binary converter built from XOR gates often follows such a sensor.

How a Decoder Works

The 2-to-4 decoder

A 2-to-4 decoder has two inputs, A (MSB) and B, four outputs Y0 to Y3 and usually an enable input E. When E = 1 the decoder is active, and when E = 0 every output stays inactive.

Each output is one AND gate fed by the inputs, with inverters where a variable must be complemented:

Y0 = E·A′·B′

Y1 = E·A′·B

Y2 = E·A·B′

Y3 = E·A·B

Compare this with the encoder. The encoder was built from OR gates. The decoder is built from AND gates and inverters, because each output must detect one specific input pattern.

The 3-to-8 decoder and the 74138

A 3-to-8 decoder has outputs Y0 to Y7, and each output Yi is the minterm mi of the three inputs. The widely used IC is the 74x138. Texas Instruments describes the family as 3-line to 8-line decoders and demultiplexers, designed for high-speed memory decoding and data-routing applications.

The chip has three enable inputs, G1 (active high) and G2A and G2B (both active low), and all three must be satisfied before any output responds. The outputs are active low, which means the selected output goes to 0 and the other seven stay at 1. This detail matters in function implementation, as the second worked example shows.

The mixed enable polarities are deliberate. The datasheet states that they let a 24-line decoder be built without external inverters, and a 32-line decoder with only one inverter. The datasheet also notes that an enable input can serve as a data input, which turns the decoder into a demultiplexer.

BCD-to-seven-segment decoder

A seven-segment display has segments labelled a to g. A BCD-to-seven-segment decoder takes a 4-bit BCD digit and lights the right segments. Digit 1 needs only segments b and c, and digit 4 needs segments b, c, f and g.

The 74LS47 is a common example of this decoder. Its output polarity has to match the display type, so the datasheet should be checked before connecting a common-anode or common-cathode display.

Address decoding

A microprocessor system has several memory and I/O chips, and only one may respond to a given address. A decoder takes the upper address lines and activates one chip-select line, while the lower address lines pass to the selected chip. This is the use for which the 74138 family was designed.

Types of Encoders and Decoders

The table below groups the common types by what they do and where they are met.

The last row deserves a note. The Holtek 212 series is built for remote-control applications. According to the datasheets, the encoder sends address and data bits with header bits over an RF or infrared link, and the paired decoder compares the received address three times continuously with its local address before it accepts the data. The HT12D provides 8 address bits and 4 data bits. An encoder and decoder pair must share the same address and data format to work together.

Encoder and Decoder Difference

The core encoder and decoder difference is direction. An encoder compresses a one-hot input into a binary code, and a decoder expands a binary code into a one-hot output. The table below sets out the rest.

A few points sit behind the table. The first is that an encoder followed by a decoder returns the original one-hot pattern only when exactly one input was active. With several active inputs, a plain encoder has already lost information, and the decoder cannot restore it.

The second point is a correction. Several online pages state that an encoder converts analog signals to digital signals. That describes an analog-to-digital converter. A logic encoder takes digital lines in and produces digital lines out, and sampling and quantization play no part in it.

The third point is that encoding here does not mean encryption. The code produced by an encoder is a fixed, public mapping with no secrecy. Anyone who knows that line 5 maps to 101 can decode it.

The last point is the confusion with the multiplexer. A multiplexer chooses one of several data inputs and passes it to a single output, guided by select lines. An encoder has no select lines and no data to pass, only a one-hot input that it converts into a number. A decoder can behave as a demultiplexer, since feeding data into its enable pin routes that data to the addressed output.

Worked Examples

Example 1: Output of a priority encoder

An 8-to-3 priority encoder such as the 74148 has active-low inputs I7 to I0, with I7 ranked highest. EI is held low (enabled). The input word is I7 I6 I5 I4 I3 I2 I1 I0 = 1 1 0 1 0 1 1 1. Find the outputs A2 A1 A0, GS and EO.

Step 1: Find the active inputs. Active-low means a 0 is active, so I5 and I3 are active.

Step 2: Apply the priority rule. I5 outranks I3, so the encoder reports 5.

Step 3: Write 5 in binary, which is 101.

Step 4: Remember the outputs are active low, so each bit is inverted. A2 A1 A0 = 010.

Step 5: GS goes low because at least one input is active and the chip is enabled. EO stays high because EO goes low only when the chip is enabled and no input is active, which is the condition used to switch on the next lower-priority chip in a cascade.

Result: A2 A1 A0 = 010, GS = 0, EO = 1.

Example 2: Full adder using a 3-to-8 decoder

Implement the sum S and carry C of a full adder with inputs A, B and Cin (A is the MSB) using a 74138 and gates.

Step 1: Write the minterm lists. The sum is 1 when an odd number of inputs are 1, so S = Σm(1, 2, 4, 7). The carry is 1 when at least two inputs are 1, so C = Σm(3, 5, 6, 7).

Step 2: Connect A, B and Cin to the decoder select inputs and enable the chip.

Step 3: Account for the polarity. The 74138 outputs are active low, so Y1 is 0 when m1 is selected and 1 otherwise.

Step 4: Combine the outputs with a NAND gate. A NAND of active-low lines equals the OR of the minterms, because NAND(Y1, Y2, Y4, Y7) = Y1′ + Y2′ + Y4′ + Y7′ = m1 + m2 + m4 + m7.

Result: S = NAND(Y1, Y2, Y4, Y7) and C = NAND(Y3, Y5, Y6, Y7).

A quick check: for A = 1, B = 0, Cin = 1 the decoder selects m5, so Y5 goes low. C sees Y5 and equals 1, while S does not include Y5 and equals 0. The sum of 1 + 0 + 1 is binary 10, which matches S = 0 and C = 1.

Example 3: A 4-to-16 decoder from two 3-to-8 decoders

Build a 4-to-16 decoder from two 74138 chips. The inputs are D, C, B, A with D as the MSB. Show which chip and which output respond to the input 1011.

Step 1: Split the work. The three lower bits C, B, A go to the select inputs of both chips. The MSB D decides which chip is enabled.

Step 2: Assign the enables. Connect D to G2A of the lower chip, so it is enabled only when D = 0. Connect D to G1 of the upper chip, so it is enabled only when D = 1. Tie the remaining enables of each chip to their active levels. No inverter is needed.

Step 3: Decode the input. For 1011, D = 1, so the upper chip is enabled and the lower chip stays disabled with all outputs high.

Step 4: The lower bits are 011, which is 3, so output Y3 of the upper chip goes low.

Step 5: The upper chip carries lines 8 to 15, so Y3 corresponds to line 8 + 3 = 11.

Result: the upper chip's Y3 goes low, and this is line 11 of the 16-line decoder, which matches binary 1011.

Example 4: How many 3-to-8 decoders make a 5-to-32 decoder?

Step 1: The output count is 32, and each chip supplies 8 lines, so 32 ÷ 8 = 4 chips are needed to supply the outputs.

Step 2: Something must choose which of the four chips is active, using the two MSBs. If the enable pins do this job, the answer is 4 chips, and as the datasheet notes, only one external inverter is needed.

Step 3: If a separate decoder is used for the two MSBs, the total is 4 + 1 = 5 chips, where the extra chip is used as a 2-to-4 decoder.

Result: 4 chips with enable-pin expansion and 5 chips with a first-stage decoder. The question wording decides which answer applies, so state the assumption.

Example 5: Sizing a circuit

An encoder must handle 40 input lines. The number of outputs n must satisfy 2ⁿ ≥ 40. Since 2⁵ = 32 is too small and 2⁶ = 64 is enough, n = 6. By the same rule, a decoder with 6 inputs has up to 64 outputs.

Real-World Applications

The encoder and decoder pair turns up wherever a few wires must carry or select among many signals. Keypads and keyboards are the standard encoder application. Each key press has to reach the processor as a code, and encoder logic turns a pressed key into that code. A priority arrangement settles what happens when two keys are pressed together.

Interrupt handling uses the priority encoder directly. When several devices request service at once, the encoder reports the highest-priority request so that the processor handles the most urgent one first.

Display drivers rely on decoders. A BCD-to-seven-segment decoder turns the 4-bit digit held by a counter or register into the segment pattern of the display, which is how digital clocks, meters and panel displays show numbers.

Memory and I/O address decoding is the most important decoder application in computer systems. A decoder converts the upper address bits into chip-select signals, so only one device answers each address. Inside a processor, an instruction decoder does a similar job, converting opcode bits into the control signals that run the right operation.

Position sensing uses encoders in the sensor sense of the word. Rotary and linear encoders report shaft angle or travel to motor controllers, and incremental types are widely used across industries because they cost little and come in resolutions from a few counts to thousands of counts per revolution.

Wireless remote controls pair an encoder at the transmitter with a decoder at the receiver, as the HT12E and HT12D do. Communication links go further. A convolutional encoder at the transmitter pairs with a Viterbi decoder at the receiver, and a Huffman encoder for compression pairs with a Huffman decoder for decompression.

The vocabulary also reaches machine learning, where an encoder-decoder architecture compresses an input into an internal representation and then generates an output from it. The idea is related, but the components are learned functions rather than fixed logic gates, so this article does not treat them as the same circuit.

Exam Relevance in India

For GATE ECE, the published syllabus for the Digital Circuits section lists combinatorial circuits that include code converters, multiplexers, decoders and PLAs. This wording was confirmed from a GATE ECE 2027 syllabus page that reproduces it, and the official brochure issued by the organising institute is the final authority. Encoders are not named in that line, but priority encoders sit naturally inside combinational design and the decoder-based function problems are fair game.

For GATE EE and IN, the digital electronics content should be checked against the current official brochure, because the exact topic wording could not be confirmed for this article.

For RRB JE, the technical syllabus for Electronics and Allied Engineering has a Digital Electronics unit. Exam-preparation sources list combinational and sequential logic circuits within it. The official syllabus page referenced the 2025 notification, so the current Centralized Employment Notice should be read for the exact topics in the latest cycle.

For SSC JE, the technical papers are organised by Civil, Electrical and Mechanical streams, and the Electrical stream lists basic electronics. How deeply digital circuits are tested is not clear from the sources reviewed, so encoders and decoders should be treated as supporting knowledge until the notification says otherwise.

Whichever paper applies, problems on this topic tend to take a handful of forms. These are implementing a function with a decoder and gates, building a larger decoder from smaller ones, finding the output of a priority encoder, and sizing the input and output lines. Memorizing the 74138 enable conditions and its active-low outputs removes most of the avoidable errors. Encoders and decoders are also basic enough to be reasonable preparation for any technical interview in electronics.

Conclusion

The encoder and decoder pair comes down to one relationship. n lines name 2ⁿ things, the encoder collapses a one-hot input to that n-bit name, and the decoder expands the name back to one active line. Every detail in this guide follows from that, including the OR-gate structure of encoders, the minterm structure of decoders and the need for priority logic when inputs collide.

The most useful habit for exams is to treat every decoder in an encoder and decoder problem as a minterm generator. Once that is clear, function implementation, cascading and active-low NAND tricks become routine steps. For anything involving an encoder, ask first whether more than one input can be active, because that single question decides whether a priority encoder is needed.

For practice, redraw the 3-to-8 truth table from memory, solve the full adder example again without the steps, and then check the syllabus wording for the paper you are targeting on the official GATE, SSC or RRB pages. Multiplexers and adders are the natural next topics in the digital electronics sequence on NvisTech.

FAQ

Q: What is  the encoder and decoder difference in one line?

An encoder converts one active input line into a binary code with fewer output lines, and a decoder converts a binary code into one active output line among many. The encoder and decoder difference is therefore one of direction and of line count, 2ⁿ to n versus n to 2ⁿ.

Q: Is an encoder an analog-to-digital converter?

No. A logic encoder works entirely on digital signals, and it accepts one-hot lines and produces a binary code. An analog-to-digital converter samples and quantizes a continuous voltage, which is a different job.

Q: Why is a priority encoder needed?

An ordinary encoder produces a wrong code when two or more inputs are active together. A priority encoder encodes only the highest-ranked active input and adds a valid output so that "no input active" can be told apart from "input 0 active".

Q: Is a decoder the same as a demultiplexer?

Not exactly, but they are closely related. A 1-to-2ⁿ demultiplexer works as an n-to-2ⁿ decoder whose enable input carries the data. The 74138 datasheet describes the chip as both a decoder and a demultiplexer for this reason.

Q: Can any Boolean function be implemented with a decoder?

Yes. A decoder produces all minterms of its inputs, so a function is built by combining the outputs for its minterms with an OR gate, or with a NAND gate when the decoder outputs are active low. For a function with more minterms than non-minterms, the complement can be built instead.

Q: What does the encoder and decoder pair mean in machine learning and communication?

In communication, an encoder prepares data for transmission, as a convolutional encoder does, and a decoder such as a Viterbi decoder recovers it at the receiver. In machine learning, an encoder-decoder model compresses an input into an internal representation and generates an output from it. The idea is related to digital logic, but the components are different.